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1 typical application features description low noise bias generator in 2mm 2mm dfn the lt ? 3048-15 generates a low noise, low ripple bias supply from an input voltage of 2.7v to 4.8v. the LT3048-15 includes a boost regulator and a ldo linear regulator. the boost regulator provides power to the linear regulator. the boost regulator output voltage is regulated to 1.1v above the ldo output, optimizing ldo ripple rejection and transient response. fixed frequency operation and current mode control allow the use of very small inductors and results in low, predictable output ripple. the linear regulator in the LT3048-15 generates a fixed 15v output. high power supply ripple rejection combined with a low noise internal reference results in less than 500v p-p output ripple and noise. the LT3048-15 is available in a 8-lead 2mm 2 mm dfn package. applications n generates low noise bias voltage from single cell li-ion battery n output current: up to 40ma n low output ripple and noise: <500v p-p n boost regulator n 2.2mhz operation n 300ma power switch n integrated schottky diode n low dropout linear regulator n low noise: <120v rms (10hz to 100khz) n 0.1% load regulation n short-circuit and thermal protection n load disconnect in shutdown n available in 2mm 2mm dfn package n sensor bias n op amp supply l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. bstout sw ldoin LT3048-15 10h ldoout v in en 1nf 1f 1f 3048 ta01a 4.7f in 2.7v to 4.8v out 15v byp off on gnd v in (v) 2.7 3.3 3.6 i out (ma) 19 22 24 load current (ma) 0 efficiency (%) 30 40 50 15 25 3048 ta01b 20 10 0 5 10 20 60 70 80 v in = 2.7v v in = 3.3v v in = 3.6v ldoout = 15v l = 10h dcr = 650m efficiency 304815f for more information www.linear.com/LT3048-15 lt 3048-15
2 pin configuration absolute maximum ratings v in .............................................................................. 6v sw ............................................................................ 25 v bs tout .................................................................... 23 v l doin ....................................................................... 22 v l doout .................................................................... 22 v by p ........................................................................ 0.3 v en ............................................................................... 6 v operating junction temperature range ( note 2) lt 304 8 e -15 ........................................ C 40 c to 125 c lt 304 8 i -15 ......................................... C40 c to 125 c maximum junction temperature .......................... 12 5 c storage temperature range .................. C 65 c to 150 c (note 1) top view sw v in gnd byp bstout en ldoin ldoout dc package 8-lead (2mm 2mm) plastic dfn 9 gnd 4 1 2 3 6 5 7 8 v ja = 102c/w exposed pad ( pin 9) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking package description temperature range lt3048edc-15#pbf lt3048edc-15#trpbf lgkk 8-lead (2mm w 2mm) plastic dfn C40c to 125c lt3048idc-15#pbf lt3048idc-15#trpbf lgkk 8-lead (2mm w 2mm) plastic dfn C40c to 125c consult lt c marketing for parts specified with wider operating temperature ranges. consult lt c marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 304815f for more information www.linear.com/LT3048-15 lt 3048-15
3 electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 3.6v, en/uvlo = 3v, unless otherwise noted. parameter conditions min typ max units v in operating range 2.7 4.8 v boost regulator bstout-ldoout regulation voltage l 1 1.1 1.2 v bstout-v in regulation voltage ldoout = 0v 1 v v in quiescent current not switching en 0.4v 475 0.1 600 1 a a switching frequency l 1.7 1.6 2.2 2.2 2.7 2.8 mhz mhz maximum duty cycle 86 90 % switch current limit 300 400 500 ma switch v cesat i sw = 200ma 220 mv diode forward drop i diode = 100ma 0.84 v en voltage high 1.25 v en voltage low 0.4 v ldo linear regulator ldoin quiescent current 14 20 a ldoout regulation voltage i load = 100a i load = 100a to 40ma l 14.775 14.625 15 15 15.225 15.375 v v ldoout load regulation ?i load = 1ma to 40ma 10 30 mv ldoout voltage noise c out = 1f, c byp = 0nf, bw = 10hz to 100khz c out = 1f, c byp = 1nf, bw = 10hz to 100khz 450 120 v rms v rms ripple rejection f ripple = 2.2mhz 20 db current limit ldoout = 15v l 45 80 ma note 2: the lt3048e-15 is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the lt3048i-15 is guaranteed over the full C40c to 125c operating junction temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. 304815f for more information www.linear.com/LT3048-15 lt 3048-15
4 typical performance characteristics ldoout voltage operating waveforms: dcm operating waveforms: ccm transient response ldoout noise efficiency (10h) efficiency (2.2h) ldoout load regulation load (ma) 0 14.5 ldoout voltage (v) 14.6 14.8 14.9 15.0 15.5 15.2 10 20 25 3048 g03 14.7 15.3 15.4 15.1 5 15 30 35 40 temperature (c) ?50 ldoout voltage (v) 15.075 25 3048 g04 15.000 14.950 ?25 0 50 14.925 14.000 15.100 15.050 15.025 14.975 75 100 125 3048 g05 500ns/div v in = 3.6v v out = 15v l = 2.2h i load = 15ma v sw 5v/div i l 100ma/div 3048 g06 500ns/div v in = 3.6v v out = 15v l = 10h i load = 20ma v sw 5v/div i l 100ma/div 10hz 1khz 100khz v in = 3.6v v out = 15v i load = 40ma l = 10h c byp = 1nf c out = 1f 10mhz 1nv/ hz 0.1v/ hz 10v/ hz load current (ma) 0 efficiency (%) 30 40 50 15 25 3048 g01 20 10 0 5 10 20 60 70 80 v in = 3.6v ldoout = 15v l = 10h dcr = 650m load current (ma) 0 40 50 70 3 5 3048 g02 30 20 1 2 4 6 7 10 0 60 efficiency (%) v in = 3.6v ldoout = 15v l = 2.2h dcr = 175m ?300 output voltage deviation (mv) load current (ma) ?250 ?150 ?100 ?50 50 10s/div v in = 3.6v v out = 15v l = 10h c ldoout = 1f c byp = 1nf i load = 4ma to 20ma 3048 g07 ?200 0 0 10 30 40 50 70 20 60 v out i load 304815f for more information www.linear.com/LT3048-15 lt 3048-15
5 typical performance characteristics ldoout current limit boost switch current limit boost switch current limit switching frequency temperature (c) ?50 0 current limit (ma) 10 30 40 50 50 90 3048 g09 20 0 ?25 75 100 25 125 60 70 80 duty cycle (%) 0 switch current limit (ma) 300 400 500 80 3048 g10 200 100 250 350 450 150 50 0 20 40 60 100 temperature (c) ?50 0 switch current limit (ma) 50 150 200 250 500 350 0 50 75 3048 g11 100 400 450 300 ?25 25 100 125 150 temperature (c) ?50 frequency (mhz) 1.5 2.0 2.5 25 75 150 3048 g12 1.0 0.5 0 ?25 0 50 100 125 304815f for more information www.linear.com/LT3048-15 lt 3048-15
6 pin functions sw (pin 1): boost regulator switch node. this is the collector of the internal power transistor and the anode of the internal schottky diode. v in (pin 2): input supply. provides operating current to the boost regulator. bypass to ground. gnd (pin 3): ground. this pin must be soldered to pcb ground. the exposed pad must also be soldered to pcb ground. byp (pin 4): bypass. add an optional capacitor from ldoout to byp to reduce noise at ldoout; otherwise leave byp unconnected. a capacitor also soft-starts the linear regulator. ldoout (pin 5): ldo linear regulator output. this pin is regulated to 15 v . bypass to ground with a minimum of 1 f. ldoin (pin 6): ldo linear regulator input. normally connected to bstout. bypass to ground. en (pin 7): enable. logic input to enable the boost and linear regulator. bstout (pin 8): boost regulator output. this pin is con- nected to the internal schottky diode and is regulated to 1.1v above ldoout. bypass to ground. gnd ( exposed pad pin 9): the internal boost power switch is connected to the exposed pad. tie to ground. 304815f for more information www.linear.com/LT3048-15 lt 3048-15
7 block diagram ? ++ 8 6 5 1 + + a1 v c gnd 3, 9 3048 f01 q1 q2 sw 2 v in in bstout ldoin c2 c4 c3 l1 ldoout out 4 byp 1.1v osc c1 7 en on off figure 1. LT3048-15 block diagram 304815f for more information www.linear.com/LT3048-15 lt 3048-15
8 operation applications information the LT3048-15 combines a boost regulator with a low dropout linear regulator to produce a 15 v output from a lower input voltage. with en below 0.4 v, all circuits are turned off, q2 disconnects the load from the input, and current consumption is less than 1 a. driving en high enables the oscillator and all bias circuits including voltage reference and regulation amplifiers. the boost regulator uses peak current mode operation, providing cycle-by-cycle current regulation and limiting, fast transient response, and good stability. the error am - plifier, a 1, regulates bstout ( and ldoin) to 1.1 v above ldoout or v in , whichever is higher. regulating 1.1 v between ldoin and ldoout allows the linear regulator to provide good transient response and ripple rejection, while maintaining good efficiency. this regulation loop also minimizes total power dissipation in fault conditions. if the output is overloaded, the linear regulator will enter current limit, ldoout voltage will decrease. by reducing the boost regulator output voltage, the voltage across q2 will be reduced, limiting dissipation in q2. thermal shutdown provides additional protection. capacitor selection a 4.7f ceramic capacitor should be sufficient for the boost regulator output bypass. low esr (equivalent series resistance) ceramic capacitors should be used at the outputs of the regulator to minimize the output ripple voltage. use only x5r or x7r dielectrics, as these materials retain their capacitance over wider voltage and temperature ranges better than other dielectrics. table 1. ceramic capacitor manufacturers manufacturer phone web taiyo yuden (408) 573-4150 www.t-yuden.com avx (803) 448-9411 www.avxcorp.com murata (714) 852-2001 www.murata.com inductor selection a 10 h inductor will suffice for most LT3048-15 applica- tions, a 2.2 h inductor can be used if the load current is below 15 ma. the inductors rms current rating must be greater than the maximum input current. to keep efficiency high, the dcr ( series resistance) should be minimized. table 2 lists several vendors. table2. inductor manufacturers vendor url coilcraft www.coilcraft.com sumida www.sumida.com toko www.toko.com wrth elektronik www.we-online.com 304815f for more information www.linear.com/LT3048-15 lt 3048-15
9 applications information figure 2. recommended pcb layout figure 3. ceramic capacitor temperature characteristics figure 4. ceramic capacitor dc bias characteristics reducing output noise with a bypass capacitor the LT3048-15 relies on the power supply rejection of the linear regulator to reduce switching regulator noise at ldoout. the linear regulator also contributes thermal noise to the output. the thermal noise can be reduced, and transient response improved, by adding a capacitor between ldoout and byp. a typical value is 1 nf. this capacitor increases start-up time of the regulator. recommended pcb layout figure 2 shows the recommended layout for LT3048-15 circuits. most important is careful placement of the bstout bypass capacitor c2. high frequency ac current flows in a loop formed by c2, internal power transistor q1 and boost diode d2. keep this loop small. also be sure to place an unbroken ground plane below this loop, on the highest copper layer below the surface. this prevents the ac loop from coupling to ldoout and other nearby circuitry. keep the sw node as small as possible. ldo stability and output capacitance the LT3048-15 linear regulator requires an output capaci - tor for stability. it is designed to be stable with most low esr capacitors ( typically ceramic, tantalum or low esr electrolytic). a minimum output capacitor of 1 f with an esr of 1 or less is recommended to prevent oscilla - tions. larger values of output capacitance decrease peak deviations and provide improved transient response for larger load current changes. bypass capacitors, used to de - couple individual components powered by the lt3048 - 15, increase the effective output capacitor value. give consideration to the use of ceramic capacitors as they are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. the most common dielectrics used are specified with eia codes of z5u, y5v, x5r and x7r. typical volt - age and temperature coefficients are shown in figures ?3 and 4. the x5r and x7r dielectrics have more stable characteristics and are most suitable for use as the output capacitor. the x7r type has better stability across tem - perature, while the x5r is less expensive and is available in higher values. care still must be exercised when using x5r and x7r capacitors; the codes only specify operating c2 c4 c3 3048 f02 c1 l1 temperature (c) ?50 40 20 0 ?20 ?40 ?60 ?80 ?100 25 75 3048 f03 ?25 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v, 1210 case size, 10f dc bias voltage (v) change in value (%) 3048 f04 20 0 ?20 ?40 ?60 ?80 ?100 0 4 8 10 2 6 12 14 x5r y5v 16 both capacitors are 16v, 1210 case size, 10f 304815f for more information www.linear.com/LT3048-15 lt 3048-15
10 applications information temperature range and maximum capacitance change over temperature. capacitance change due to dc bias with x5r and x7r capacitors can be significant enough to drop capacitor values below appropriate levels. capaci - tor dc bias characteristics tend to improve as case size increases, but expected capacitance at operating voltage should be verified. voltage and temperature coefficients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress. in a ceramic capacitor, the stress can be induced by vibrations in the system or thermal transients. 304815f for more information www.linear.com/LT3048-15 lt 3048-15
11 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. 2.00 0.05 (4 sides) 2.00 sq 0.05 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.55 0.05 bottom view?exposed pad 0.23 ref 0.335 ref 0.335 ref 0.75 0.05 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dc8ma) dfn 0113 rev ? 0.23 0.05 0.45 bsc 0.25 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.90 ref 0.23 ref 0.85 0.05 1.8 ref 1.8 ref 2.60 0.05 package outline 0.45 bsc pin 1 notch r = 0.15 dc8 package 8-lead plastic dfn (2mm 2mm) (reference ltc dwg # 05-08-1939 rev ?) exposed pad variation aa 304815f for more information www.linear.com/LT3048-15 lt 3048-15
12 ? linear technology corporation 2014 lt 0214 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LT3048-15 related parts typical applications high i out with 10h inductor low i out with small 2.2h inductor efficiency efficiency (2.2h) bstout sw ldoin LT3048-15 10h lps3008-103mlb ldoout v in en 1nf 1f 1f 3048 ta02a 4.7f in 2.7v to 4.8v out 15v byp off on gnd v in (v) 2.7 3.3 3.6 i out (ma) 19 22 24 load current (ma) 0 efficiency (%) 30 40 50 15 25 3048 ta02b 20 10 0 5 10 20 60 70 80 v in = 2.7v v in = 3.3v v in = 3.6v ldoout = 15v l = 10h dcr = 650m bstout sw ldoin LT3048-15 2.2h lps3008-222mlb ldoout v in en 1nf 1f 1f 3048 ta03a 4.7f in 2.7v to 4.8v out 15v 7ma byp off on gnd load current (ma) 0 efficiency (%) 30 40 50 4 5 7 3048 ta03b 20 10 0 1 2 3 6 60 70 80 v in = 2.7v v in = 3.3v v in = 3.6v ldoout = 15v l = 2.2h dcr = 175m part number description comments lt3460 300ma, 38v i sw , 1.3mhz, high efficiency step-up dc/dc converter v in : 2.5v to 16v, v out(max) = 38v, i q = 2.8ma, i sd < 1a, thinsot? package lt 3461/lt3461a 300ma, 38v i sw , 1.3mhz, high efficiency step-up dc/dc converters v in : 2.5v to 16v, v out(max) = 36v, i q = 2ma, i sd < 1a, sc70, thinsot packages lt3464 120ma, 38v i sw , high efficiency step-up dc/dc converter with integrated schottky, output disconnect v in : 2.3v to 10v, v out(max) = 34v, i q = 25ma, i sd < 1a, thinsot package lt1613 550ma i sw , 1.4mhz, high efficiency step-up dc/dc converter v in : 0.9v to 10v, v out(max) = 34v, i q = 3ma, i sd < 1a, thinsot package lt1761 20v, 100ma (i out ) low noise ldo v in : 1.8v to 20v, v out(min) = 1.22v, i q = 20a, i sd < 1a, thinsot package lt3009 20v, 20ma (i out ) low noise ldo v in : 1.6v to 20v, v out(min) = 0.6v, i q = 3a, i sd < 1a, sc70, 2mm 2mm dfn-6 packages 304815f for more information www.linear.com/LT3048-15 lt 3048-15

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